Specifications

228 www.xilinx.com Embedded System Tools Guide (EDK 6.2i)
1-800-255-7778 UG111 (v1.4) January 30, 2004
Chapter 15: Microprocessor Hardware Specification (MHS)
R
The range specified by C_BASEADDR and C_HIGHADDR must comprise a complete,
contiguous power-of-two range, such that range = 2
N
, and the N least significant bits of
C_BASEADDR must be zero.
Power Signals (net_gnd/net_vcc)
Power signals are signals that are constantly driven with either GND (net_gnd) or VCC
(net_vcc).
Format
PORT mysignal = power_signal
In this example, power_signal is either “net_vcc” or “net_gnd”. PlatGen expands
“net_vcc” or “net_gnd” to the appropriate vector size.
Unconnected Ports
Unconnected output ports are assigned open, and unconnected input ports are either set to
GND (net_gnd) or VCC (net_vcc).
An unconnected port is identified as an empty double-quote (““) string.
PlatGen resolves the driver value on unconnected input ports by the INITIALVAL
keyword as defined in the MPD.
Format
PORT mysignal = ""
Constant Assignments
Use 0b denotation to define a binary constant or 0x for a hex constant. An underscore (_)
can be used for readability.
Format
PORT mysignal = 0b1010_0101 # mysignal is 8-bits
Or
PORT mysignal = 0xA5 # mysignal is 8-bits
Concatenation
Concatenation is performed with the (&) operator and allows you to group signals
together.
Concatenation combines signals in their bit order. For example, given the following top-
level port declarations:
PORT A = A, DIR=INPUT
PORT B = B, DIR=INPUT, VEC[1:0]
PORT C = C, DIR=INPUT
PORT D = D, DIR=INPUT, VEC[0:3]
PORT Y = A & B & C & D, DIR=OUTPUT, VEC=[7:0]