Specifications

220 www.xilinx.com Embedded System Tools Guide (EDK 6.2i)
1-800-255-7778 UG111 (v1.4) January 30, 2004
Chapter 15: Microprocessor Hardware Specification (MHS)
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However, Verilog allows such a declaration:
microblaze microblaze ( <snip> );
It is also illegal in VHDL to declare an object (parameter/component/instance/signal)
name that already exists as a name of another object. For example, it is illegal to declare in
VHDL a signal name, MYTESTNAME, and also declare an instance name of
MYTESTNAME.
signal MYTESTNAME : std_logic;
MYTESTNAME : microblaze
port map ( <snip> );
However, this is legal in Verilog.
It’s the user’s responsibility to recognize their output format and comply with the rules of
the HDL language.
Comments
You can insert comments in the MPD file without disrupting processing. The following are
guidelines for inserting comments:
x Precede comments with the pound sign (#)
x Comments can continue to the end of the line
x Comments can be anywhere on the line
Format
Use the following format at the beginning of a component definition:
BEGIN peripheral_name
The BEGIN keyword signifies the beginning of a new peripheral.
Use the following format for assignment commands:
command name = value
Use the following format to end a peripheral definition:
END
Assignment Commands
There are three assignment commands:
1. BUS_INTERFACE
2. PARAMETER
3. PORT
MHS Example
The following is an example MHS file:
# Parameters
PARAMETER VERSION = 2.1.0
# Global Ports