Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 151
UG111 (v1.4) January 30, 2004 1-800-255-7778
VHDL Peripheral Definitions
R
...
attribute BUSID : string;
attribute BUSID of Peripheral:entity is "A:OPB_SLAVE,B:OPB_SLAVE";
CORE_STATE Attribute
The state of the IP core is specified with the CORE_STATE attribute.
Format
attribute CORE_STATE : string;
attribute CORE_STATE of Peripheral:entity is
"ACTIVE";
The following values are valid:
x ACTIVE - Core is active (full uninhibited use) by EDK. This is the default setting.
x DEPRECATED - Core is deprecated. EDK tools allow use of core, but issues a warning
that the core is deprecated.
x OBSOLETE - Core is obsolete. EDK tools issue an error that this core is no longer
valid.
x DEVELOPMENT - Core is in development and will be synthesized each time the
platform generation tools are run (no cacheing of synthesis results).
DWIDTH Attribute
The data width supported by the BRAM controller is specified by the DWIDTH attribute.
Format
attribute DWIDTH : integer;
attribute DWIDTH of Peripheral:entity is 32;
Used only by components of SPECIAL=BRAM_CNTLR.
HDL Attribute
The HDL attribute lists the HDL availability. The design is either completely written in
VHDL, or completely written in Verilog. The BOTH value signifies that design is available
in VHDL or Verilog format. PsfUtility automatically inserts this attribute for a single
language.
Format
attribute HDL : string;
attribute HDL of Peripheral:entity is
"VHDL";
IMP_NETLIST Attribute
In hierarchal mode, this attribute directs the Platform Generator to write an
implementation netlist file for the peripheral. In flatten mode, the IMP_NETLIST attribute
is ignored since the entire system is synthesized. PsfUtility automatically inserts this
attribute with a value set to TRUE if not otherwise specified.