Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 145
UG111 (v1.4) January 30, 2004 1-800-255-7778
VHDL Peripheral Definitions
R
<BI><Mn>_busLock : out std_logic;
<BI><Mn>_compress : out std_logic;
<BI><Mn>_guarded : out std_logic;
<BI><Mn>_lockErr : out std_logic;
<BI><Mn>_MSize : out std_logic;
<BI><Mn>_ordered : out std_logic;
<BI><Mn>_priority : out std_logic_vector(0 to 1);
<BI><Mn>_rdBurst : out std_logic;
<BI><Mn>_request : out std_logic;
<BI><Mn>_size : out std_logic_vector(0 to 3);
<BI><Mn>_type : out std_logic_vector(0 to 2);
<BI><Mn>_wrBurst : out std_logic;
<BI><Mn>_wrDBus : out std_logic_vector(0 to C_<BI>PLB_DWIDTH-1);
Examples:
IM_request : out std_logic;
Bridge_request : out std_logic;
O2Ob_request : out std_logic;
PLB Master Inputs
For interconnection to the PLB, all masters must provide the following inputs:
<BI><nPLB>_Clk : in std_logic;
<BI><nPLB>_Rst : in std_logic;
<BI><nPLB>_AddrAck : in std_logic;
<BI><nPLB>_Busy : in std_logic;
<BI><nPLB>_Err : in std_logic;
<BI><nPLB>_RdBTerm : in std_logic;
<BI><nPLB>_RdDAck : in std_logic;
<BI>
<nPLB>_RdDBus : in std_logic_vector(0 to C_<BI>PLB_DWIDTH-1);
<BI><nPLB>_RdWdAddr : in std_logic_vector(0 to 3);
<BI><nPLB>_Rearbitrate : in std_logic;
<BI><nPLB>_SSize : in std_logic_vector(0 to 1);
<BI><nPLB>_WrBTerm : in std_logic;
<BI><nPLB>_WrDAck : in std_logic;
Examples:
IPLB_MBusy : in std_logic;
Bus1_PLB_MBusy : in std_logic;
Slave PLB Ports
Slave PLB ports must follow these naming conventions:
x <Sln> is a meaningful name or acronym for the slave output. <Sln> must not contain
the string, “PLB” (upper or lower case or mixed case), so that slave outputs will not be
confused with bus outputs.
x <nPLB> is a meaningful name or acronym for the slave input. The last three
characters of <nPLB>
must contain the string, “PLB” (upper or lower case or mixed
case).
x <BI> is a Bus Identifier; it is optional for peripherals with a single slave PLB port, and
required for peripherals with multiple slave PLB ports. <BI> must not contain the
string, “PLB” (upper or lower case or mixed case). For peripherals with multiple PLB
ports, the <BI> strings must be unique for each bus interface.
x If <BI> is present, then <Sln> is optional.