Specifications

140 www.xilinx.com Embedded System Tools Guide (EDK 6.2i)
1-800-255-7778 UG111 (v1.4) January 30, 2004
Chapter 8: Platform Specification Utility
R
x <BI> is a Bus Identifier; it is optional for peripherals with a single slave DCR port, and
required for peripherals with multiple slave DCR ports. <BI> must not contain the
string, “DCR” (upper or lower case or mixed case). For peripherals with multiple
slave DCR ports, the <BI> strings must be unique for each bus interface.
x If <BI> is present, then <Sln> is optional.
DCR Slave Outputs
For interconnection to the DCR, all slaves must provide the following outputs:
<BI><Sln>_dcrDBus : out std_logic_vector(0 to C_<BI>DCR_DWIDTH-1);
<BI><Sln>_dcrAck : out std_logic;
Examples:
Uart_dcrAck : out std_logic;
Intc_dcrAck : out std_logic;
Memcon_dcrAck : out std_logic;
Bus1_timer_dcrAck : out std_logic;
Bus1_timer_dcrDBus : out std_logic_vector(0 to C_<BI>DCR_DWIDTH-1);
Bus2_timer_dcrAck : out std_logic;
Bus2_timer_dcrDBus : out std_logic_vector(0 to C_<BI>DCR_DWIDTH-1);
DCR Slave Inputs
For interconnection to the DCR, all slaves must provide the following inputs:
<BI><nDCR>_ABus : in std_logic_vector(0 to C_<BI>DCR_AWIDTH-1);
<BI><nDCR>_DBus : in std_logic_vector(0 to C_<BI>DCR_DWIDTH-1);
<BI><nDCR>_Read : in std_logic;
<BI><nDCR>_Write : in std_logic;
Examples:
DCR_DBus : in std_logic_vector(0 to C_<BI>DCR_DWIDTH-1);
Bus1_DCR_DBus : in std_logic_vector(0 to C_<BI>DCR_DWIDTH-1);
Slave LMB Ports
Slave LMB ports must follow these naming conventions:
x <Sln> is a meaningful name or acronym for the slave output. <Sln> must not contain
the string, “LMB” (upper or lower case or mixed case), so that slave outputs will not
be confused with bus outputs.
x <nLMB> is a meaningful name or acronym for the slave input. The last three
characters of <nLMB> must contain the string, “LMB” (upper or lower case or mixed
case).
x <BI> is a Bus Identifier; it is optional for peripherals with a single slave LMB port, and
required for peripherals with multiple slave LMB ports. <BI> must not contain the
string, “LMB” (upper or lower case or mixed case). For peripherals with multiple
slave LMB ports, the <BI> strings must be unique for each bus interface.
x If <BI> is present, then <Sln> is optional.
LMB Slave Outputs
For interconnection to the LMB, all slaves must provide the following outputs:
<BI><Sln>_DBus : out std_logic_vector(0 to C_<BI>LMB_DWIDTH-1);