Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 135
UG111 (v1.4) January 30, 2004 1-800-255-7778
VHDL Peripheral Definitions
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For components that have more than one bus interface of the same type, a naming
convention must be followed so that the automation tools can group the bus interfaces.
Naming Conventions for VHDL Generics
A key concept for cores with more than one bus interface port is the use of a bus identifier,
which is attached to all signals grouped together in a port as well as the generics that are
associated with the bus interface port. The bus identifier is discussed below.
Generic names must be VHDL compliant. As with any language, VHDL has certain
naming rules and conventions that you must follow. Additional conventions for IP cores
are:
x The generic must start with “C_”.
x If more than one instance of a particular bus interface type is used on a core, a bus
identifier, <BI>, must be used in the signal identifier and a corresponding BUSID
attribute must be defined for the entity. If a bus identifier is used for the signals
associated with a port, then the generics associated with that port may also optionally
use the <BI>. If no <BI> string is used in the name, then the generics associated with
bus parameters are assumed to be global. For example, C_DOPB_DWIDTH has a bus
identifier of “D” and is associated with the bus signals that also have a bus identifier
of “D”. If only C_OPB_DWIDTH is present, it is associated with all OPB buses
regardless of the bus identifier on the port signals.
x For cores that have only a single bus interface (which is the case for most peripherals),
the use of the bus identifier string in the signal and generic names is optional and the
bus identifier will not typically be included. If the bus identifier is used, a
corresponding BUSID attribute must be used on the entity as well.
x All generics that specify a base address must end with _BASEADDR, and all generic
that specify a high address must end with _HIGHADDR. Further, to tie these
addresses with buses, these must also follow the conventions for parameters as listed
above. For peripherals with more than one type of bus interface, the parameters must
have the bus standard type specified in the name. For example, an address on the PLB
bus must be specified as C_PLB_BASEADDR and C_PLB_HIGHADDR.
The Platform Generator automatically expands and populates certain reserved generics. In
order for this to work correctly, a bus tag must be associated with these parameters. In
order to have PsfUtility automatically infer this information, all the above specified
conventions must be followed for all reserved generics as well. This can help prevent
Master OPB interface MOPB
Master/slave OPB interface MSOPB
Slave OPB interface SOPB
Master PLB interface MPLB
Master/slave PLB interface MSPLB
Slave PLB interface SPLB
Table 8-1: Recognized Bus Interfaces
Description Bus label in MPD