Specifications

Embedded System Tools Guide (EDK 6.2i) www.xilinx.com 109
UG111 (v1.4) January 30, 2004 1-800-255-7778
Compiling EDK Simulation Libraries
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UNISIM Library
This is a library of functional models used for behavioral and structural simulation. It
contains default unit delays and includes all of the Xilinx Unified Library components that
are inferred by most popular synthesis tools. The UNISIM library also includes
components that are commonly instantiated such as I/Os and memory cells.
You can instantiate the UNISIM library components in your design (VHDL or Verilog) and
simulate them during behavioral and structural simulation.
SIMPRIM Library
This is a library used for timing simulation. This library includes all of the Xilinx Primitives
Library components that are used by Xilinx implementation tools.
Structural and Timing simulation models generated by SimGen will instantiate SIMPRIM
library components.
XilinxCoreLib Library
The Xilinx CORE Generator is a graphical intellectual property design tool for creating
high-level modules like FIR Filters, FIFOs, CAMs as well as other advanced IP. You can
customize and pre-optimize modules to take advantage of the inherent architectural
features of Xilinx FPGA devices, such as block multipliers, SRLs, fast carry logic and on-
chip, single-port or dual-port RAM.
The CORE Generator HDL library models are used for behavioral simulation. You can
select the appropriate HDL model to integrate into your HDL design. The models do not
use library components for global signals.
EDK Library
Used for behavioral simulation. It contains all the EDK IP components, precompiled for
ModelSim SE and PE. EDK IP components library is provided for VHDL only.
The EDK library can be compiled with COMPEDKLIB. Please refer to the Getting Started
with EDK document to find out how to compile these libraries.
Compiling EDK Simulation Libraries
Before starting behavioral simulation of your design, you must compile the EDK
Simulation Libraries for the target simulator. For this purpose Xilinx® provides a tool
called COMPEDKLIB.
COMPEDKLIB is a tool for compiling the EDK HDL based simulation libraries using the
tools provided by the simulator vendor.
Usage
compedklib [ -h ] [ -o output-dir-name ] [ -lp repository-dir-name ]
[ -X compxlib-output-dir-name ] [ -E compedklib-output-dir-name ]
This tool compiles the HDL in EDK pcore libraries for simulation using the simulators
supported by the EDK. Currently, the only supported simulator is MTI PE/SE.