Specifications

CHAPTER 14: FORMAL VERIFICATION
SPECIFYING ADDITIONAL SETTINGS
ALTERA CORPORATION INTRODUCTION TO QUARTUS II ■ 227
Specifying Additional Settings
When you are compiling a project to generate files that will be used with
formal verification tools, Altera strongly recommends that you turn off the
following options:
■ The Perform gate-level register retiming option must be turned off in
the Synthesis Netlist Optimizations page, which is under Analysis &
Synthesis Settings in the Settings dialog box (Assignments menu).
■ The Perform register retiming option must be turned off on the
Physical Synthesis Optimizations page, which is under Fitter Settings
in the Settings dialog box.
Altera recommends that you turn off these options because they often result
in moving and merging registers along the critical path, which may affect
the registers in cones of logic that the formal verification tools may use as
comparison points.
f
For Information About Refer To
Using Cadence Encounter Conformal
software
“Cadence Encounter Conformal Support” in
the Quartus II Handbook, vol. 3, on the
Altera web site
“Overview: Using the Encounter Conformal
Software with the Quartus II Software” in
Quartus II Help
Using Synopsis Formality software “Synopsis Formality Support” in the
Quartus II Handbook, vol. 3, on the Altera
web site
f
For Information About Refer To
Additional guidelines and options for
Cadence Encounter Conformal
software
“Cadence Encounter Conformal Support” in
the Quartus II Handbook, vol. 3, on the
Altera web site
“Overview: Using the Encounter Conformal
Software with the Quartus II Software” in
Quartus II Help