Specifications

CHAPTER 1: DESIGN FLOW
EDA TOOL DESIGN FLOW
ALTERA CORPORATION INTRODUCTION TO QUARTUS II ■ 11
Figure 7. EDA Tool Design Flow
Table 2 shows the EDA tools that are supported by the Quartus II software,
and indicates which EDA tools have NativeLink
®
support. NativeLink
technology facilitates the seamless transfer of information between the
Quartus II software and other EDA tools and allows you to run the EDA tool
automatically from within the Quartus II software.
Quartus II
Timing Analyzer
Quartus II Fitter
Quartus II
EDA Netlist Writer
Output files for EDA tools,
including Verilog Output Files (.vo),
VHDL Output Files (.vho), VQM
Files, Standard Delay Format
Output Files (.sdo), testbench files,
symbol files, Tcl script files (.tcl),
IBIS Output Files (.ibs) & STAMP
model files (.data, or .mod)
Quartus II
Analysis &
Synthesis
EDA Synthesis
Tool
EDA Timing
Analysis Tool
Source design files,
including VHDL Design
Files (.vhd) & Verilog
Design Files (.v)
EDIF netlist
files (.edf) or Verilog
Quartus Mapping Files (.vqm)
Quartus II
Simulator
EDA Simulation
Tool
EDA Physical
Synthesis Tool
EDA Board-Level
Design Tool
EDA Formal
Verification Tool
Quartus II
Assembler
Quartus II
Programmer