Specifications

CHAPTER 9: TIMING CLOSURE
USING THE TIMING CLOSURE FLOORPLAN
ALTERA CORPORATION INTRODUCTION TO QUARTUS II ■ 165
nodes that feed the selected logic cell, embedded cell, and/or pin
assignments. The Fan-Out list displays all nodes that are fed by the selected
logic cell, embedded cell, and/or pin assignments.
Making Assignments
To facilitate achieving timing closure, the Timing Closure floorplan allows
you to make or change location assignments directly in the floorplan. You
can create and assign nodes or entities to custom regions and to LogicLock
regions in the Timing Closure floorplan, and you can also edit existing
assignments to pins, logic cells, rows, columns, regions, MegaLAB
structures, and LABs. You can also locate any node (or set of nodes) to the
Assignment Editor and make assignments there.
You can edit assignments in the Timing Closure floorplan in the following
ways:
■ Cut, copy, and paste node and pin assignments.
■ Launch the Assignment Editor to make assignments.
■ Use the Node Finder to help make assignments.
■ Create and assign logic to LogicLock regions.
■ Drag and drop nodes and entities from the Hierarchy tab of the Project
Navigator, LogicLock regions, and the Timing Closure floorplan to
other areas of the floorplan.
Before making assignments, you can preserve resource assignments from
the current compilation by back-annotating assignments to pins, logic cells,
rows, columns, regions, LABs, MegaLAB structures, and LogicLock regions
by using the Back-Annotate Assignments command (Assignments menu).
For more information on using the Back-Annotate Assignments command,
see “Preserving Assignments through Back-Annotation” on page 106 in
Chapter 5, “Place & Route.”
f
For Information About Refer To
Viewing assignments and routing in
the Timing Closure floorplan
“Timing Closure Floorplan,” in the
Quartus II Handbook, vol. 2, on the Altera
web site
“Overview: Viewing Routing Information” in
Quartus II Help