Specifications

CHAPTER 6: BLOCK-BASED DESIGN
USING LOGICLOCK REGIONS
ALTERA CORPORATION INTRODUCTION TO QUARTUS II ■ 117
You can create and modify LogicLock regions by using the Timing Closure
floorplan, the LogicLock Regions Window command (Assignments menu),
the Hierarchy tab of the Project Navigator, or by using Tcl scripts. All
LogicLock attributes and constraint information (clock settings, pin
assignments, and relative placement information) are stored in the
Quartus II Settings File (.qsf) for the project.
You can use the Timing Closure floorplan to create and edit LogicLock
region assignments. You can draw LogicLock regions in the Timing Closure
floorplan with the Create New Region button and then drag and drop nodes
from the floorplan view, the Node Finder, or the Hierarchy tab of the Project
Navigator.
After you have created a LogicLock region, you can use the LogicLock
Regions window to view all of the LogicLock regions in your design,
including size, state, width, height, and origin. You can also edit and add
new LogicLock regions. See Figure 2.
Figure 2. LogicLock Regions Window
You can also use the LogicLock Regions Properties dialog box to edit
existing LogicLock regions, open the Back-Annotate Assignments dialog
box to back-annotate all nodes in a LogicLock region, view information on
the LogicLock regions in the design, and determine which regions contain
illegal assignments.
In addition, you can add path-based assignments (based on source and
destination nodes), wildcard assignments, and Fitter priority for path-based
and wildcard assignments to LogicLock regions. Setting the priority allows
you to specify the order in which the Quartus II software resolves conflicting
path-based and wildcard assignments. You can open the Priority dialog box
from the LogicLock Region Properties dialog box. See Figure 3.