Specifications

CHAPTER 5: PLACE & ROUTE
OPTIMIZING THE FIT
100 INTRODUCTION TO QUARTUS II ALTERA CORPORATION
The Timing Closure floorplan provides different views of the device and
helps you make precise assignments to specific locations. You can also view
equations and routing information, and demote assignments by dragging
and dropping assignments to various regions in the Regions window. If
your design has too many constraints that prevent it from fitting in the
device, you may also be able to optimize fitting by removing some of the
location assignments and allowing the Fitter to place the logic.
Setting Options that Control Place &
Route
You can set several options that control the Fitter and may affect place and
route:
Fitter options
Fitting optimization and physical synthesis options
Individual and global logic options that affect fitting
Setting Fitter Options
The Fitter Settings page of the Settings dialog box (Assignments menu)
allows you to specify options that control timing-driven compilation and
compilation speed. You can specify whether the Fitter should try to use
registers in I/O cells (rather than registers in regular logic cells) to meet
timing requirements and assignments that relate to I/O pins. You can direct
the Fitter to consider only slow-corner timing delays when optimizing the
design, or to consider fast-corner timing delays as well as slow-corner
timing delays when optimizing the design to meet timing requirements at
both corners. You can specify whether you want the Fitter to use standard
fitting, which works hardest to meet your f
MAX
timing requirements, to use
the fast fit feature, which improves the compilation speed but may reduce
the f
MAX
, or to use the auto fit feature, which reduces Fitter effort after
meeting timing requirements and may decrease compilation time. The Fitter
Settings page also allows to you specify that you want to limit Fitter effort
to only one attempt, which may also reduce the f
MAX
.