Specifications

2000 Jun 26 18
Philips Semiconductors Product specification
Digital servo processor and Compact Disc
decoder with integrated DAC for video CD (CD7 II)
SAA7327
7.8.2 EXTERNAL DAC INTERFACE
Audio data from the CD7 II decoder can be sent direct to
an external DAC, identical to the SAA737x series. This is
similar to the ‘loopback’ mode, but in this case the internal
DAC outputs can be held at zero i.e. shadow register 7 is
set to XX00. The SAA7327 is compatible with a wide range
of external DACs. Eleven formats are supported and are
given in Table 4. Figures 12 and 13 show the Philips
I
2
S-bus and the EIAJ data formats respectively. When the
decoder is operated in lock-to-disc mode, the SCLK
frequency is dependent on the disc speed factor ‘d’.
All formats are MSB first and f
s
is (44.1 × n) kHz.
The polarity of the WCLK and the data can be inverted;
selectable by decoder register 7. It should be noted that
EF is only a defined output in CD-ROM and 1f
s
modes.
When using an external DAC (or when using the onboard
DAC in non-loopback mode), the serial data inputs to the
onboard DAC (SCLI, SDI and WCLI) should be left
unconnected.
Table 5 DAC interface formats
Note
1. In this mode the first 16 bits contain data, but if any of the fade, attenuate or de-emphasis filter functions are activated
then the first 18 bits contain data.
REGISTER 3
SAMPLE
FREQUENCY
NUMBER OF
BITS
SCLK (MHz) FORMAT INTERPOLATION
1010 f
s
16 2.1168 × n CD-ROM (I
2
S-bus) no
1011 f
s
16 2.1168 × n CD-ROM (EIAJ) no
1110 f
s
16/18
(1)
2.1168 × n Philips I
2
S-bus 16/18 bits
(1)
yes
0010 f
s
16 2.1168 × n EIAJ 16 bits yes
0110 f
s
18 2.1168 × n EIAJ 18 bits yes
0000 4f
s
16 8.4672 × n EIAJ 16 bits yes
0100 4f
s
18 8.4672 × n EIAJ 18 bits yes
1100 4f
s
18 8.4672 × n Philips I
2
S-bus 18 bits yes
0011 2f
s
16 4.2336 × n EIAJ 16 bits yes
0111 2f
s
18 4.2336 × n EIAJ 18 bits yes
1111 2f
s
18 4.2336 × n Philips I
2
S-bus 18 bits yes