Repair manual

2-40
THEORY OF OPERATION
Because the VRAM’s cannot run as fast as the video rate, a number of VRAM
bytes must be read and compared in parallel. The four comparator outputs
(VID0 - VID3) are then applied to the 4-bit latch in the Video Generation circuit.
Note
For 2048 (2K) pixel wide systems,
four VRAM’s are required to
generate two bytes of pixel data in
parallel.
For 4096 (4K) pixel wide systems,
eight VRAM’s are required to read
four bytes of pixel data
simultaneously.
Upon command from the Video Generation control PAL, the 4-bit parallel image
signal is then processed by the Video Genration circuit into a 1-bit serial video
image signal (VIDEO) and a video data signal (VIDDATA). The 1-bit serial
VIDEO signal is then applied to the Cathode Driver network on the Monitor P.C.
Board. The monitor display screen turns on, exposing the film to the video
image. At the end of each exposure sequence, the VIDEO signal is inhibited,
causing the monitor display screen to turn off.
The video data signal (VIDDATA) is a control signal for the Pixel Counter in the
Horizontal Timing Counter circuit. Basically, this counter is read by the micro
processor so that the video diagnostic progrom is able to verify that the video
image is being generated. Refer to paragraph 7 for a functional description of the
Horizontal Timing Counter circuit.
5. Vertical Deflection
The Vertical Deflection circuit (Figure 2-9, sheet 7) processes the digital
deflection data from the microprocessor control network into an analog vertical
deflection signal (VDEFLECT) with a voltage range of +4.0 to -4.0 vdc. The
vertical deflection is programmed to a specified value (e.g. +4v, 0v, -4v) and
resides in the EPROM. This VDEFLECT signal is applied via connector J9 to
the input of the Vertical Deflection processor on the Monitor P.C. Board. The
Vertical Deflection processor reprocesses the generated VDEFLECT signal into a
vertical drive pulse that is capable of directly driving the vertical yoke of the
CRT. At the end of the exposure of a line of pixels (which requires multiple
scans), the CRT beam is deflected vertically one scan line. Refer to paragraph E
in this Section of the Service Manual for a functional description of how