Repair manual

2-25
THEORY OF OPERATION
The generated RESET signal initializes:
o Horizontal Timing Generator (Control PAL, Pixel Latch,
Horizontal 9-Bit Down Counter).
o Video Generation Circuit (Address Latch).
Upon Power-up or manual Reset, the firmware in EPROM will
perform system diagnostics. If any diagnostics fail, the front
panel LED will blink the familiar SOS pattern. If all diagnostics
pass, the LED will by turned on. Four diagnostics are performed:
o DRAM diagnostics: the base 128Kbytes of memory are tested
with various patterns. If the optional 512K of DRAM is avail-
able, it is also tested.
o VRAM diagnostics: the VRAM devices are tested with similar
patterns to verify their operation.
o Frequency synthesizer operation: the frequency synthesizer is
tested by allowing it to lock and verifying that the synthesized
HSYNC signal, which appears as an input to the TIMR1 input
of the CPU, is stable and at the proper frequency.
o Video data test: the feed-back loop of video data is used to
verify that video data is being properly generated.
If the base 128 Kbytes of memory fails it's diagnostics, the '186 is
unable to perform any additional diagnostics and will not be able
to communicate with the host. Any other diagnostic failure,
however, does not prevent the '186 from communicating with the
host system. In this case, the host can use the INQUIRE ERROR
command to determine the specific diagnostic which has failed.
2) Manual Reset
The manual RESET switch mounted on the rear panel of the
Digital Palette initializes the Digital Palette just like the
Power Up Reset explained in paragraph 1. However, it is also
used to expose the resident test image to verify that the Digital
Palette is functioning properly.