Repair manual

2-21
THEORY OF OPERATION
Table 2-4. Device I/O Data Select Lines (Con’t)
Select Line Function
PCS2 This select line is asserted for I/O addresses 0x100 to
0x17F.
The I/O map for this space is:
0x0100 RD - General I/O Read
0x0100 WR - General I/O Write
108 WR - Vertical D/A Data Write
108 WR - Video Data Position Read
118 RD - Clear Vertical D/A Data Enable
118 WR - Enable Vertical D/A Data
120 RD - Clear Refresh DMA Transactions
120 WR - Enable Refresh DMA Transaction
140 RD - Auto Luminant A/D Read
PCS3 This select line is asserted for I/O addresses 0x180 to
0x1FF. It address space is used to control the loading of
information into the vertical D/A devices. The low 6 bits
of the address bus (LA0 to LA5) serve as the control bits
for the Vertical D/A’s.
PCS4 This select line is asserted for addresses 0x200 to 0x27F.
Its address space is used for the optional SCSI daughter
board.
PCS5 This select line is asserted for addresses 0x280 to 0x2FF.
It is available on the external bus connectors for I/O
devices on expansion boards. There are no I/O devices at
this time that will respond to reads or writes in this I/O
space.
PCS6 This select line is asserted for addresses 0x300 to 0x37F.
It is available on the external bus connectors for I/O
devices on expansion boards. There are no I/O devices at
this time that will respond to reads or writes in this I/O
space.