Owner`s manual

Figure 4–50: Failing DAL Register 2 (FDAL2)
3
1 0
ECC<31:0>
msb−p339−90
Figure 4–51: Failing DAL Register 3 (FDAL3)
3
1
2
4
2
3
1
6
1
50
MUST BE ZERO DP<7:0> ECC<47:32>
msb−p340−90
Figure 4–52: Interprocessor Implied Vector Interrupt Generation Regis-
ter (IPIVINTR)
3
1
1
6
1
50
MUST BE ZERO IPIVINTR Destination Mask
msb−p341−90
4–28 VAX 6000 Model 500 Mini-Reference