Owner`s manual

7–12 Vector Register n (VREGn) .......................... 7–11
7–13 Arithmetic Exception Register (ALU_OP) . . ............. 7–11
7–14 Scalar Operand Low Register (ALU_SCOP_LO) .......... 7–12
7–15 Scalar Operand High Register (ALU_SCOP_HI) .......... 7–12
7–16 Vector Mask Low Register (ALU_MASK_LO) ............ 7–12
7–17 Vector Mask High Register (ALU_MASK_HI) ............ 7–13
7–18 Exception Summary Register (ALU_EXC) . . ............. 7–13
7–19 Diagnostic Control Register (ALU_DIAG_CTL) ........... 7–14
7–20 Current ALU Instruction Register (VCTL_CALU) ......... 7–14
7–21 Deferred ALU Instruction Register (VCTL_DALU) . . . ..... 7–15
7–22 Current ALU Operand Low Register (VCTL_COP_LOW) . . . 7–15
7–23 Current ALU Operand High Register (VCTL_COP_HI) ..... 7–15
7–24 Deferred ALU Operand Low Register (VCTL_DOP_LOW) . . . 7–16
7–25 Deferred ALU Operand High Register (VCTL_DOP_HI) .... 7–16
7–26 Load/Store Instruction Register (VCTL_LDST) ........... 7–17
7–27 Load/Store Stride Register (VCTL_STRIDE) ............. 7–17
7–28 Illegal Instruction (VCTL_ILL) . ...................... 7–18
7–29 Vector Controller Status (VCTL_CSR) .................. 7–19
7–30 Module Revision (MOD_REV) . . ...................... 7–20
7–31 P0 Base Register (LSX_P0BR) . . ...................... 7–20
7–32 P0 Length Register (LSX_P0LR) ...................... 7–20
7–33 P1 Base Register (LSX_P1BR) . . ...................... 7–21
7–34 P1 Length Register (LSX_P1LR) ...................... 7–21
7–35 System Base Register (LSX_SBR) ..................... 7–21
7–36 System Length Register (LSX_SLR).................... 7–22
7–37 Load/Store Exception Register (LSX_EXC) . ............. 7–22
7–38 Translation Buffer Control Register (LSX_TBCSR) . . . ..... 7–22
7–39 Memory Management Enable (LSX_MAPEN) ............ 7–23
7–40 Translation Buffer Invalidate All Register (LSX_TBIA) ..... 7–23
7–41 Translation Buffer Invalidate Single Register (LSX_TBIS) . . 7–23
7–42 Vector Mask Low Register (LSX_MASKLO) . ............. 7–24
7–43 Vector Mask High Register (LSX_MASKHI) ............. 7–24
7–44 Load/Store Stride Register (LSX_STRIDE) . ............. 7–24
7–45 Load/Store Instruction Register (LSX_INST) ............. 7–25
7–46 Cache Control Register (LSX_CCSR) ................... 7–26
7–47 Translation Buffer Tag Register (LSX_TBTAG) ........... 7–26
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