Owner`s manual

Figure 4–30: MSSC Configuration Register (SSCCNR)
3
1
3
0
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
0
1
9
1
8
1
6
1
5
1
4
1
2
1
1
1
0 876 432 0
MBZ MBZ
CREG Address
Enable (CREG ADS ENA)
EEPROM Enable
(EEPROM ADS ENA)
Console Terminal Baud Rate Select
(TERM BAUD SEL)
CTRL/P Enable (CTRL/P ENA)
ROM Halt Protect Address Space Size
(HALT PROT)
ROM Address Space Size Select (ROM SIZE)
ROM Speed
Interrupt Priority Level Select (IPL SEL)
Interrupt Vector Disable (IV Disable)
Battery Low (BLO)
msb−p323R−90
00 0
Figure 4–31: MSSC Bus Timeout Control Register (SSCBTR)
3
1
3
0
2
9
2
4
2
30
MBZ Bus Timeout Interval
Read Write Timeout (RWT)
Bus Timeout (BTO)
msb−p324−90
KA65A CPU Module Registers 4–21