Owner`s manual

Figure 4–1: Interval Clock Control and Status Register (ICCS)
3
1 765 0
MUST BE ZERO MUST BE ZERO
Receiver Interrupt Enable (RX IE)
msb−p376−90
Figure 4–2: Console Receiver Control and Status Register (RXCS)
3
1 8765 0
MUST BE ZERO MUST BE ZERO
Receiver Done (RX DONE)
Receiver Interrupt Enable (RX IE)
msb−p266−90
Figure 4–3: Console Receiver Data Buffer Register (RXDB)
3
1
1
6
1
5
1
4
1
3
1
2
1
1
1
087 0
MUST BE ZERO MBZ
Error (ERR)
Overrun Error (OVR ERR)
Framing Error (FRM ERR)
Received Break (RCV BRK)
Received Data
msb−p267−90
0
4–8 VAX 6000 Model 500 Mini-Reference