Owner`s manual

C
Cache Control Register, 7–26
Console
error messages, 1–11 to 1–21
Console commands
SHOW CONFIGURATION
and self-test results, 2–5
summary chart, 1–4
Console commands and qualifiers,
1–4 to 1–7
Console control characters, 1–7
Console Receive Data Buffer
Register, 4–8
Console Receiver Control and Status
Register, 4–8
Console Saved Processor Status
Longword, 4–10
Console Saved Program Counter
Register, 4–10
Console Transmitter Control and
Status Register, 4–9
Console Transmitter Data Buffer
Register, 4–9
Control and Status Register, 6–9,
6–11
Control panel, 1–2
Control panel status indicator lights,
1–4
Control Register 0, 4–19
Control Register 1, 4–20
Control Register Address Decode
Mask Register, 4–23
Control Register Base Address
Register, 4–22
Control Register Write Enable, 4–20
CRADMR, 4–23
CRBADR, 4–22
CREG0, 4–19
CREG1, 4–20
CREGWE, 4–20
Current ALU Instruction Register,
7–14
Current ALU Operand High
Register, 7–15
Current ALU Operand Low Register,
7–15
D
DAL Diagnostic Register, 4–27
DCSR, 4–27
Deferred ALU Instruction Register,
7–15
Deferred ALU Operand High
Register, 7–16
Deferred ALU Operand Low
Register, 7–16
Device Register, 4–30, 5–2, 6–3
Diag 1 Register, 6–8
Diagnostic Control Register, 7–14
Diagnostic Control Register 1, 6–13
Disable fault parse tree
FV64A, 7–30 to 7–31
DTYPE, 6–14
DWMBB/A Error Summary Register,
6–6
DWMBB/B Error Summary Register,
6–11
DWMBB registers, 6–2
E
EEADMR, 4–23
EEBADR, 4–23
EECTL, 5–10
EEPROM Address Decode Mask
Register, 4–23
EEPROM Base Address Register,
4–23
EEPROM Control Register, 5–10
ENADR, 5–7
Ending Address Register, 5–7
Exceptions
machine check, 4–36
Exception Summary Register, 7–13
F
Failing Address Extension Register,
6–10
Index–2