Owner`s manual

Figure 7–52: FV64A Disable Fault Parse Tree
VPSR<VEN> <0> = 0, Vector disabled
(select one)
<25>
Illegal vector opcode
VPSR<AEX>
VAER<FUN>
<7> Vector arithmetic exception
(select all)
msb−p290−90
VPSR<IVO>
Floating Underflow
Floating Divide by Zero
Floating Reserved Operand
Floating Overflow
Integer Overflow
Hard error interrupt
VAER<FDZ>
<0>
No error bits set
VAER<FRS>
<1>
VAER<FOV>
<2>
VAER<IOV>
<3>
<5>
Vector Module Registers 7–31