Owner`s manual

Figure 7–26: Load/Store Instruction Register (VCTL_LDST)
6
3
3
2
Load Store Base Address
2
4
2
3
2
2
1
6
1
5
1
4
1
3
1
2
1
18743
Opcode
Modify Intent
(MI)
msb−p149−90
3
1 0
Vector Register A (VRA)
Vector Register B (VRB)
Vector Register C (VRC)
Vector Length
Masked Operations Enable (MOE)
Match True/False (MTF)
Current Processor Mode (CUR MOD)
Figure 7–27: Load/Store Stride Register (VCTL_STRIDE)
3
1 0
Load/Store Stride
msb−p150−90
Vector Module Registers 7–17