Owner`s manual

7.3 FV64A Internal Processor Registers
Figure 7–5: Vector Processor Status Register (VPSR)
3
1
3
0
2
6
2
5
2
4
2
3 876 210
MBZ MUST BE ZERO MBZ
Vector Arithmetic
Exception (AEX)
Vector Processor Enabled/Disabled (VEN)
msb−p122−90
Reset (RST)
Implementation−Specific Hardware Error (IMP)
Illegal Vector Opcode (IVO)
Vector Processor Busy (BSY)
Figure 7–6: Vector Arithmetic Exception Register (VAER)
3
1
1
6
1
5 6543210
MUST BE ZERO
Vector Destination Register Mask
Integer Overflow (IOV)
Floating Overflow (FOV)
msb−p123−90
0
Floating Reserved Operand (FRS)
Floating Divide by Zero (FDZ)
Floating Underflow (FUN)
7–8 VAX 6000 Model 500 Mini-Reference