Owner`s manual

Table 7–1: Internal Processor Registers

Address

decimal (hex) Type Class

Vector Copy—P0 Base P0BR 8 (8) WO 1

Vector Copy—P0 Length P0LR 9 (9) WO 1

Vector Copy—P1 Base P1BR 10 (A) WO 1

Vector Copy—P1 Length P1LR 11 (B) WO 1

Vector Copy—System Base SBR 12 (C) WO 1

Vector Copy—System Length SLR 13 (D) WO 1

Accelerator Control and Status ACCS 40 (28) R/W 2 I

Vector Copy—Memory Management

Enable

MAPEN 56 (38) WO 1

Vector Copy—Translation Buffer

Invalidate All

TBIA 57 (39) WO 1

Vector Copy—Translation Buffer

Invalidate Single

TBIS 58 (3A) WO 1

Vector Interface Error Status VINTSR 123 (7B) R/W 2

Vector Processor Status VPSR 144 (90) R/W 3

Vector Arithmetic Exception VAER 145 (91) RO 3

Vector Memory Activity Check VMAC 146 (92) RO 3

Vector Translation Buffer

Invalidate All

VTBIA 147 (93) WO 3

Vector Indirect Register Address VIADR 157 (9D) R/W 3

Vector Indirect Data Low VIDLO 158 (9E) R/W 3

Vector Indirect Data High VIDHI 159 (9F) R/W 3

Key to Types:

RO–Read only, WO–Write only, R/W–Read/write

Key to Classes:

1–Implemented by KA65A CPU with a copy in the FV64A vector module.

2–Implemented by KA65A CPU module.

3–Implemented by FV64A vector module.

I–Initialized on KA65A reset (power-up, system reset, and node reset).

Vector Module Registers 7–3