Owner`s manual

Figure 5–3: Starting and Ending Address Register (SEADR)
3
1
3
0
2
9
2
8
2
4
2
3
1
6
1
5
1
1
1
0 87654 210
MUST BE ZERO MBZ MBZ
Top
msb−p237−90
MBZ
512 MByte
Ending
Address
(TENADR)
Ending Address
(ENADR)
Starting Address (STRADR)
Interleave Address (INADn)
Interleave Address Mode (INTMn)
Figure 5–4: Memory Control Register 1 (MCTL1)
3
1
3
0
2
9
2
8
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
09876543210
Data RMWrite Error
(DRMWER)
Interlock Sequence
Error (INSEQ)
Enable 2−Mbyte Data
Protection Mode (EPM)
On−Board Memory
Valid (MEMVAL)
Inhibit CRD Status
Generation (ICRD)
RAM Type (RAMTYP)
Memory Size (MEMSIZ)
Data ECC Disable (DECCD)
Data ECC Diagnostic Mode (DECCM)
MCTL1, MCTL2 and MECER Error Summary (ERRSUM)
0 MBZ
C C C C C C C C
65432107
msb−p231−90
Data Check Bits
(DCKB)
MS65A Memory Registers 5–3