Owner`s manual

Chapter 5
MS65A Memory Registers
Table 5–1: MS65A Memory Control and Status Registers
Name Mnemonic Address
Device Register XDEV BB
1
+00
Bus Error Register XBER BB + 04
Starting and Ending Address Register SEADR BB + 10
Memory Control Register 1 MCTL1 BB + 14
Memory ECC Error Register MECER BB + 18
Memory ECC Error Address Register MECEA BB + 1C
Memory Control Register 2 MCTL2 BB + 30
TCY Tester Register TCY BB + 34
Block State ECC Error Register BECER BB + 38
Block State ECC Address Register BECEA BB + 3C
Starting Address Register STADR BB + 50
Ending Address Register ENADR BB + 54
Segment/Interleave Control Register INTLV BB + 58
Memory Control Register 3 MCTL3 BB + 5C
Memory Control Register 4 MCTL4 BB + 60
Block State Control Register BSCTL BB + 68
Block State Address Register BSADR BB + 6C
EEPROM Control Register EECTL BB + 70
Time-out Control/Status Register TMOER BB + 74
1
"BB" refers to the base address of an XMI node (E800 0000 + (node ID x 8000)).
MS65A Memory Registers 5–1