Specifications

DISPLAY PROCESSOR STATUS REGISTER
The DISPLAY PROCESSOR STATUS re~ister is used by the MC68000 CPU to obtain the
status df events the have an effect on the operation of the VS100 system. This
resister is a 'read only' resister.
address = 8000CO (HEX)
read only
bit
7
6 5 4 3 2
1
o
I D7 I D6 I D5 I D4 I D3 I D2 I D1 I XX I
bit 7
=
mouse
pushbuttonfriSht.
losic
1
(3v)
=
OFF
losic
0
(Ov)
=
ON
bit
6
=
ITIOIJSe
pushbuttonfmiddle.
losic
1
(3v)
=
OFF
loSic
0
(Ov)
=
ON
bit
5
=
mOt.Jse pl.Jshbutton f left
loSic
1
(3v)
=
OFF
loSic
0
(Oy)
=
ON
bit
4
=
1 i rlk. available
loSic
1
(3v)
=
link
is
present
losic
0
(Oy)
=
link
not
available
bit
:3
=
1 irlk
error
lOSic
1
(3v)
=
link
error detected
loSic
0
(Oy)
=
rIo
1 irlk
error
detected
bit
2
=
norl-e~{ i stant lI,emorY
losic
1
(3v)
=
the UBW
attempted
to
access
norl-eHistant
VAX
merr,orY.
Illesable
address
from the BBA
or the
DPM.
Used as
a
status
bit to
indicate
the
reason
for failure
to
Sain
access to
the
UNI-BUS.
losic
0
(Ov)
=
address
placed
on
the
the
uni-blJs
was
a valid
address.
loSic
0
(Ov)
=
bit "1
=
BBA
?resent
losic
1
(3v)
=
BBA not
preser,t
losic
0
(Ov)
=
BBA
present
bit
0
=
mantJf actlJ 1" i nS
mode
losic
1
(3v)
=
not
in
mar.uf actu r i ns
mode
logic
0
(Ov)
=
the module
is in
a
man'Jf actlJ ring ertV i roment.