Specifications

7.0.8
TABLET PORT
Internal loop-back mode is set on the Tablet USART, and
the same scheme used to test the CRTC Cursor Resister is implemented
here on the data holdins re~ister. The internal loop-back scheme
reGuires that the mode re~isters be set UP for normal operations, in
order to test the USART as it would normall~ be used. Therefore, the
Tablet USART is initialised precedins the test, as follows!
Baud Rate (-- 9600
Parit~ Control Disabled
As~nchronous Receive/Transmit Mode
1 Stop Bit
8 Data Bits (Character LenSth)
I/O (-- 16 x Baud Rate
The I/O bit is initialised to 16 times the Baud Rate factor to account
for b~te-Iensth characters. Followins the test, the receiver is
enabled and the transmitter disabled. The transmitter must be enabled
prior to each transmit operation, as transmit interrupts are cleared by
disabling the transmitter.
7.0.9
KEYBOARD PORT
Internal loop-back mode is set on the Keyboard USART,
and the same scheme used to test the CRTC Cursor ReSisters is implemented
here on the data holdinS reSister. The internal loop-back scheme reauires
that the mode reSisters be set UP for normal operations, in order to test
the US ART as it would normall~ be used. Ther~fore, the Ke~board USART is
initialised precedins the test, as follows:
Baud Rate (-- 4800
Parit~ Control Disabled
As~nchronous Receive/Transmit Mode
1
Stop Bit
8 Data Bits (Character LenSth)
I/O (-- 16 x Baud Rate
The I/O bit is initialised to 16 times the Baud Rate factor to account
for b~te-Ie~Sth characters. FollowinS the test, the receiver is
enabled and the transmitter disabled. The transmitter must be enabled
prior to each transmit operation, as transmit interrupts are cleared by
disablinS the transmitter.