User`s guide

XMI Registers
Bus Error Register (XBER)
bit<3>
Name: Enable Hexword Write
Mnemonic: EHWW
Type: RO, 0
EHWW is used to enable/disable the transmission of hexword writes
of all types (Write Mask, Unlock Write Mask, Disown Write Mask)
on those controllers that implement them. When EHWW is set, the
commander is permitted to generate hexword writes; when EHWW is
clear, the commander is restricted from generating hexword writes.
Commanders that do not implement hexword writes have EHWW
as zero. While software sets or clears EHWW at any time, normally
software writes an appropriate value to EHWW after both power-ups
and node resets.
bit<2>
Name: Disable XMI Timeout
Mnemonic: DXTO
Type: RO, 0
DXTO is used to enable/disable the reporting of all XMI timeouts by
a commander. When DXTO is set, the commander never encounters
either a transaction timeout or a no read response and and never
sets the NRR bit (XBER<18>) or the TTO bit (XBER<13>). If a
commander has a current outstanding XMI transaction when DXTO
transitions from zero to one (the TTO or RETO counters are counting),
timeouts are disabled. If a commander has a current outstanding
XMI transaction when DXTO transitions from one to zero (the TTO or
RETO counters are not counting), timeouts are enabled.
bit<1:0>
Name: Reserved
Mnemonic: None
Type: RO, 0
Reserved; must be zero.
2–65