User`s guide

XMI Registers
Bus Error Register (XBER)
bit<24>
Name: Inconsistent Parity Error
Mnemonic: IPE
Type: R/W1C, 0
When set, IPE indicates that the node has detected a parity error on
an XMI cycle and the confirmation for the errored cycle was ACK.
This indicates that at least one node (the responder) detected good
parity during the cycle time that this node detected a parity error.
Only XMI processor nodes are required to implement this bit. If not
implemented, nodes return zero.
bit<23>
Name: Parity Error
Mnemonic: PE
Type: R/W1C, 0
When set, PE indicates that the node has detected a parity error on an
XMI cycle.
bit<22>
Name: Write Sequence Error
Mnemonic: WSE
Type: R/W1C, 0
When set, WSE indicates that the node aborted a write transaction
due to missing data cycles. Only XMI responder nodes are required to
implement this bit. If not implemented, nodes return zero.
bit<21>
Name: Read/IDENT Data NO ACK
Mnemonic: RIDNAK
Type: R/W1C, 0
When set, RIDNAK indicates that a Read or IDENT data cycle (GRDn,
CRDn, LOC, RER) transmitted by the node has received a NO ACK
confirmation.
2–61