User`s guide

The XMI
2.5.6 Unlock Write Mask Transaction
The Unlock Write Mask (UWMASK) transaction (see Figure 2–17),
combined with a corresponding Interlock Read transaction, is used to
relinquish the locked memory location after an Interlock Read.
Figure 2–17 Unlock Write Mask Command
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90
WRITE MASK ADDRESS<29:0>
LENGTH 00 = Hexword
01 = Longword
10 = Quadword
11 = Octaword
msb−p190−89
0110 MBZ
ADDRESS<39:30>
UNLOCK WRITE MASK COMMAND
After a node successfully gains the lock in memory and finishes the
required access to the shared structure, it then relinquishes the lock
by performing an UWMASK to the memory with appropriate data. The
memory, which has been monitoring the bus traffic, reacts to the Unlock
Write Mask by unlocking memory and writing the data in the request.
UWMASK transactions to I/O space are implementation dependent and
can only be longword length. Quadword- and octaword-length transactions
are only used in memory space.
All controllers that perform hexword Unlock Write Mask transactions also
implement a mode where all functions are accomplished without using
either hexword Write Mask or hexword Unlock Write Mask transactions.
The Enable Hexword Write (EHWW) bit in XBER enables the controller’s
use of hexword writes.
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