User`s guide

Contents
2.5.6 Unlock Write Mask Transaction 2–40
2.5.7 Disown Write Mask Transactions 2–41
2.5.8 Tag Bad Data Transactions 2–42
2.5.9 Interrupt and Identify Transactions 2–43
2.5.10 Implied Vector Interrupt Transactions 2–45
2.5.11 Transaction Examples 2–46
2.5.11.1 Single Quadword Reads • 2–46
2.5.11.2 Multiple Quadword Reads • 2–48
2.5.11.3 Longword and Quadword Writes • 2–50
2.5.11.4 Multiple Quadword Writes • 2–51
2.6 CACHE COHERENCY 2–52
2.7 XMI INITIALIZATION 2–53
2.7.1 Causes of an Initialization 2–54
2.7.2 Power-Up 2–54
2.7.3 System Reset 2–55
2.7.4 Node Reset 2–55
2.8 XMI REGISTERS 2–56
DEVICE REGISTER (XDEV) 2–57
BUS ERROR REGISTER (XBER) 2–58
FAILING ADDRESS REGISTER (XFADR) 2–66
XMI GENERAL PURPOSE REGISTER (XGPR) 2–68
NODE-SPECIFIC CONTROL AND STATUS REGISTER
(NSCSR) 2–69
XMI CONTROL REGISTER (XCR) 2–70
FAILING ADDRESS EXTENSION REGISTER (XFAER) 2–72
BUS ERROR EXTENSION REGISTER (XBEER) 2–74
2.9 XMI ERRORS 2–76
2.9.1 Error Conditions 2–76
2.9.1.1 Parity Error • 2–76
2.9.1.2 Inconsistent Parity Error • 2–76
2.9.1.3 Transaction Timeout • 2–77
2.9.1.4 Sequence Error • 2–77
2.9.2 Error Handling 2–78
2.9.3 Error Recovery 2–79
2.9.4 Error Reporting 2–79
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