User`s guide

Index
T
Tag Bad Data transaction • 2–42
TBDATA • 2–42
Temperature sensor, cabinet • 4–2
Terminal port • 1–11
Terms defined • 2–7
Timeout Address Register • 3–106
Timeout Disable bit • 3–35
Timeout Limit field • 3–35, 3–83
Timeouts
DWMBB • 3–131
response • 2–77, 3–35
retry • 2–77, 3–35
TLIM field
See Timeout Limit field
TOY • 4–3
Transaction errors • 2–77
Transaction register files • 3–137
Transactions • 2–31 to 2–51
Disown Write Mask • 2–41
Identify • 2–43
Implied Vector Interrupt • 2–45, 2–76
Interlock Read • 2–35
Interrupt • 2–43
Ownership Read • 2–37
Read • 2–34, 2–46 to 2–50
Tag Bad Data • 2–42
terms defined • 2–7
Unlock Write Mask • 2–40
Write Mask • 2–38
Writes • 2–50 to 2–51
Transaction Timeout bit • 2–63, 3–50, 3–124
Transmit Lockout Status bit • 3–75, 3–147
TRF
See Transaction register files
TRIGC field
See Trigger Control field
Trigger bit
See XMI Trigger bit
Trigger Control field • 2–71
TTO bit
See Transactions Timeout bit
See Transaction Timeout bit
U
UNCORR DMA ECC ERR bit
UNCORR DMA ECC ERR bit (Cont.)
See Uncorrectable DMA ECC Error bit
Uncorrectable DMA ECC Error bit • 3–59
Uncorrectable PMR ECC Error bit • 3–58, 3–128
UNCORR PRM ECC ERR bit
See Uncorrectable PMR ECC Error bit
Unexpected Read Response bit • 2–74
Unlock Write Mask transaction • 2–40
URR bit
See Unexpected Read Response bit
Utility Register • 3–81
UWMASK • 2–40
V
VAXBI BAD bit • 3–98
VAXBI card cages • 1–15
VAXBI Device Register
See DTYPE register
VAXBI DMA Failing Address field • 3–106
VAXBI DMA Failing Address Length field • 3–106
VAXBI Error Address Register • 3–94
VAXBI Failing Address field • 3–95
VAXBI Failing Address Length field • 3–94
VAXBI I/O window space • 3–36
VAXBI Interlock Read Failed bit • 3–103, 3–120
VAXBI Interlock Read Failed Mask bit • 3–99
VAXBI Interrupt-Pending Status field • 3–101
VAXBI nodespace and window space address
assignments • 2–18
VAXBI Power-Up LED bit • 3–99
VAXBI registers • 2–19
VAXBI Window Space Enable bit • 3–36, 3–89, 3–131
VAXBI Window Space field • 3–36, 3–85
VAXBI wrapped read transactions • 3–26
Vector Offset Register • 3–107
Vector Register • 3–108
Voltage • 1–12
VOR field
See DWMBB/B Vector Offset Register field
W
WDNAK bit
See Write Data NO ACK bit
WEI bit
See Write Error Interrupt bit
WMASK • 2–38
Index–8