User`s guide

DWMBB Adapter
2 Either
a. Set DWMBB/A Loopback Enable and Flip Address Bit<29> to put
the DWMBB in DWMBB/A module loopback mode and to convert
I/O transactions targeted for the DWMBB/B module or a VAXBI
node into a DMA transaction targeted for XMI memory.
Or
b. Set DWMBB/B Flip Address Bit<29> to put the DWMBB into a
DMA loopback mode and to convert I/O transactions targeted for a
VAXBI node into a DMA transaction targeted for XMI memory.
3 Set either Force DMA-A Buffer Busy or Force DMA-B Buffer Busy to
select the DMA-A or DMA-B buffer by forcing the other buffer busy.
4 Set DWMBB/A Flip Address Bit<1> or DWMBB/B Flip ADDR Bit<1>
to access the desired quadword of the selected octaword DMA buffer of
the transmit registers.
5 Perform an I/O write transaction with the appropriately selected
address bit<2>, so that the looped back DMA transaction uses the
desired longword in the DMA buffer.
6 Perform an I/O read transaction with the same selected address
settings. The looped back DMA command returns the appropriate
data to the DWMBB through the receive registers. The DWMBB then
returns this data back to the XMI as the read data for the original
I/O command that started the looped back DMA read command. The
returning I/O read data should match the data used for the I/O write
command that was converted to the looped back DMA write command.
7 Use the following procedure to test both the DMA-A and DMA-B
buffers:
a. Repeat steps 1 through 6 four times with the DMA-A buffer forced
busy and with the four possible combinations of either DWMBB/A
Flip Failing Address Bit<1> or DWMBB/B Flip Failing Address
Bit<1> and XMI I/O Address Bit<2>.
b. Repeat steps 1 through 6 four times with the DMA-B buffer forced
busy and with the four combinations of either DWMBB/A Flip
Failing Address Bit<1> or DWMBB/B Flip Failing Address Bit<1>
and XMI I/O Address Bit<2>.
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