User`s guide

DWMBB/B Module Registers
Control and Status Register (BCSR)
Control and Status Register (BCSR)
BCSR contains DWMBB/B module operational control and status bits.
ADDRESS
XMI nodespace base address + 0000 0040
3
1
3
0 543210
MUST BE ZERO
VAXBI BAD
VAXBI Interlock Read Failed Mask
IBUS Parity Error Interrupt Mask
VAXBI Power−Up LED
Enable DWMBB Interrupts on the XMI
msb−p113−89
0
bit<31>
Name: Enable DWMBB Interrupts
Mnemonic: None
Type: R/W, 0
Enable DWMBB Interrupts, when set, enables the DWMBB to
generate XMI interrupt requests in response to DWMBB-generated
or VAXBI-generated interrupts. The appropriate interrupt mask bits
must also be set for interrupts to be generated.
bits<30:5>
Name: Reserved
Mnemonic: None
Type: RO, 0
Reserved; must be zero.
bit<4>
Name: VAXBI BAD
Mnemonic: BI BAD
Type: RO
VAXBI BAD at power-up and node reset reflects the state of the
BI BAD L line on the VAXBI. It is used by console initialization
software and error-handling software to detect faulty VAXBI nodes.
The assertion of BI BAD L on a VAXBI node results in the assertion of
the XMI BAD line.
3–98