User`s guide

DWMBB/A Module Registers
Page Map Registers (PMRs)
Page Map Registers (PMRs)
The DWMBB/A module contains 64K page map registers which are used
to store page frame numbers (PFNs) for extended address translation. The
format of the PMRs is identical.
ADDRESS
XMI nodespace address BB + 0000 0200 to BB + 0004
01FC
3
1
3
0
2
9
2
6
2
50
Page Frame Number
MSB for 40−bit Address Translation − 8−Kbyte pages
MSB for 40−bit Address Translation − 4−Kbyte pages
MSB for 40−bit Address Translation − 512−Kbyte pages
Page Map Register Entry Bit 30
Valid (PMR V)
msb−p391−91
0* * *
bit<31>
Name: Valid
Mnemonic: PMR V
Type: R/W, 0
System software sets this bit when it loads a valid PFN into the PFN
field of the PMR. The bit is used by the DWMBB during address
translation to determine the validity of the PFN stored in the PMR.
bit<30>
Name: Page Map Register Entry Bit 30
Mnemonic: PMRE_30
Type: R/W, 0
PMRE_30 is a read/write bit that is undefined in normal operation.
Diagnostics use this bit to write an entire 32-bit page map register
entry.
3–96