User`s guide

DWMBB/A Module Registers
Interrupt Mask Register (AIMR)
bit<5>
Name: Interrupt on BCI AC LO
Mnemonic: INTR BCI AC LO
Type: R/W, 0
When Interrupt on BCI AC LO is set, the DWMBB generates an
interrupt if BCI AC LO (AESR<5>) sets.
bit<4>
Name: Interrupt on DMA-A Data Parity Error
Mnemonic: INTR DMA-A DATA PE
Type: R/W, 0
When the Interrupt on DMA-A Data Parity Error bit is set, the
DWMBB generates an interrupt if IBUS DMA-A Data Parity Error
(AESR<4>) sets.
bit<3>
Name: Interrupt on IBUS DMA-A C/A Parity Error
Mnemonic: INTR DMA-A CA PE
Type: R/W, 0
When the Interrupt on IBUS DMA-A C/A Parity Error bit is set, the
DWMBB generates an interrupt if IBUS DMA-A C/A Parity Error
(AESR<3>) sets.
bit<2>
Name: Interrupt on DMA-B Data Parity Error
Mnemonic: INTR DMA-B DATA PE
Type: R/W, 0
When the Interrupt on DMA-B Data Parity Error bit is set, the
DWMBB generates an interrupt if IBUS DMA-B Data Parity Error
(AESR<2>) sets.
bit<1>
Name: Interrupt on IBUS DMA-B C/A Parity Error
Mnemonic: INTR DMA-B CA PE
Type: R/W, 0
When the Interrupt on IBUS DMA-B C/A Parity Error bit is set, the
DWMBB generates an interrupt if IBUS DMA-B C/A Parity Error
(AESR<1>) sets.
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