User`s guide

DWMBB/A Module Registers
Interrupt Mask Register (AIMR)
bit<27>
Name: Interrupt on Corrected Confirmation
Mnemonic: INTR CC
Type: R/W, 0
When Interrupt on Corrected Confirmation is set, the DWMBB
generates an interrupt if Corrected Confirmation (XBER<27>) sets.
bits<26:25>
Name: Reserved
Mnemonic: None
Type: RO, 0
Reserved; must be zero.
bit<24>
Name: Interrupt on Inconsistent Parity Error
Mnemonic: INTR IPE
Type: R/W, 0
When Interrupt on Inconsistent Parity Error is set, the DWMBB
generates an interrupt if Inconsistent Parity Error (XBER<24>) sets.
bit<23>
Name: Interrupt on Parity Error
Mnemonic: INTR PE
Type: R/W, 0
When Interrupt on Parity Error is set, the DWMBB generates an
interrupt if Parity Error (XBER<23>) sets.
bit<22>
Name: Interrupt on Write Sequence Error
Mnemonic: INTR WSE
Type: R/W, 0
When Interrupt on Write Sequence Error is set, the DWMBB generates
an interrupt if Write Sequence Error (XBER<22>) sets.
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