User`s guide

DWMBB/A Module Registers
Interrupt Mask Register (AIMR)
Interrupt Mask Register (AIMR)
AIMR enables/disables the generation of an error interrupt transaction when
the corresponding error bit in either the DWMBB/A module’s Bus Error
Register (XBER) or the DWMBB/A module’s Error Summary Register (AESR)
is set.
ADDRESS
XMI nodespace base address + 0000 0014
3
1
3
0
2
8
2
7
2
6
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
09876543210
MBZ
Enable IVINTR
Transactions
INTR CC
INTR CRD
INTR NRR
INTR RSE
INTR RER
INTR IE
msb−p106−89
INTR IPE
INTR PE
INTR WSE
MBZ
INTR TTO
RESERVED
INTR IPFN
0
INTR DMAB DATA PE
INTR CNAK/NXM
INTR IO WRT FAIL
INTR RIDNAK
INTR WDNAK
INTR CORR ECC ERR
INTR DMAB CA PE
INTR I/O RD PE
RESERVED
INTR BCI AC LO
INTR UNCORR ECC ERR
INTR DMAA DATA PE
INTR INV BI ADR
INTR DMAA CA PE
3–64