User`s guide

DWMBB/A Module Registers
Bus Error Register (XBER)
bit<10>
Name: Selt-Test Fail
Mnemonic: STF
Type: R/W1C, 1
When set, STF indicates that the DWMBB has not yet passed its self-
test. This bit is cleared by the CPU node that executed the DWMBB
self-test when the DWMBB passes its self-test.
bits<9:4>
Name: Failing Commander ID
Mnemonic: FCID
Type: RO, 0
The Failing Commander ID field logs the commander ID of a failing
transaction. FCID sets only if all reattempts fail.
bit<3>
Name: Reserved
Mnemonic: None
Type: RO, 0
Reserved; must be zero.
bit<2>
Name: Disable XMI Timeout
Mnemonic: DXTO
Type: R/W, 0
When set, the Disable XMI Timeout bit disables the transaction
timeout counter, causing Timeout Limit (AUTLR<23:20>) to be
ignored. The DWMBB either retries a transaction on the XMI or waits
for returning DMA read data in response to a successful XMI read for
an indefinite period. The DWMBB never aborts the transaction or sets
TTO. Other nodes on the VAXBI, however, may time out due to their
own timers.
bits<1:0>
Name: Reserved
Mnemonic: None
Type: RO, 0
Reserved; must be zero.
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