User`s guide

DWMBB/A Module Registers
Bus Error Register (XBER)
bit<24>
Name: Inconsistent Parity Error
Mnemonic: IPE
Type: R/W1C, 0
IPE, when set, indicates that the node detected a parity error on an
XMI cycle and that at least one other node (the responder) detected
good parity during the cycle (the confirmation for the cycle was ACK).
This bit sets for all XMI inconsistent parity errors, regardless of
whether the XMI cycle targeted this node.
bit<23>
Name: Parity Error
Mnemonic: PE
Type: R/W1C, 0
When set, PE indicates that the DWMBB detected a parity error on an
XMI cycle.
bit<22>
Name: Write Sequence Error
Mnemonic: WSE
Type: R/W1C, 0
When set, WSE indicates that the DWMBB aborted a write transaction
directed to it due to missing data cycles.
bit<21>
Name: Read/IDENT Data NO ACK
Mnemonic: RIDNAK
Type: R/W1C, 0
When set, RIDNAK indicates that a Read or IDENT data cycle (GRDn,
CRDn, LOC, RER) transmitted by the DWMBB received a NO ACK
confirmation.
bit<20>
Name: Write Data NO ACK
Mnemonic: WDNAK
Type: R/W1C, 0
When set, WDNAK indicates that a Write data cycle (GRDn,
CRDn, LOC, RER) transmitted by the DWMBB received a NO ACK
confirmation.
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