User`s guide

DWMBB Adapter
3.7 Commander Arbitration Using Responder Request
Two signals are used for arbitrating for the bus, XMI CMD
REQ[n] L and XMI RES REQ[n] L. The XMI RES REQ[n] L has
a higher priority than the XMI CMD REQ[n] L signal. When the
Commander Arbitration Using Responder Request bit is set in the
ACSR, Control and Status Register bit <4>, the DWMBB adapter
arbitrates for the XMI at a higher priority than XMI commanders.
Figure 3–12 Responder Request and XMI SUP L Timing
XMI Cycle Number
1234
Node
recognizes
need to
stop com−
mander
traffic
Node
asserts
XMI SUP L
DWMBB
issues
command
on XMI
DWMBB
blocks
commands
from
being
issued
on XMI
No more
commander
transfers
msb−p094−89
The DWMBB does not issue commands while XMI SUP L is asserted,
preventing the overflow of data queues on the XMI. When XMI SUP L
asserts, not more than one DMA transaction is initiated by the DWMBB
on the XMI. If the DWMBB receives a grant after it sees XMI SUP L
asserted, it completes the current pending transaction but also forces null
cycles on the XMI. This prevents the current pending transaction from
being issued on the XMI. The DWMBB then reissues the transaction when
XMI SUP L is deasserted, as shown in Figure 3–12.
The option is used to prevent timouts on nonpended buses that may be
attached to the VAXBI.
CAUTION: Commander Arbitration Using Responder Request may be
necessary for systems where severe VAXBI latencies cause
excessive timeouts. This option is NOT a standard XMI
recommended feature and should ONLY be used when necessary.
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