User`s guide

DWMBB Adapter
3.3.2 I/O References to the PMRs
An I/O read transaction directed to a page map register (PMR) is first
latched into the DWMBB/A module. Parity is checked and, if no errors
are detected and no DMA transaction is in progress, the specific PMR is
accessed. If a DMA transaction is in progress, the PMR read is not done
until the DMA transaction completes its PMR access. A PMR read is
complete once the DWMBB/A module validates the 12-bit PMR ECC code,
arbitrates for the XMI, and successfully sends the PMR read data to the
commander. After the DWMBB arbitrates for the XMI as a responder and
sends the I/O read data to the originating XMI commander, the DWMBB
is ready to accept another I/O transaction.
An I/O write transaction directed to a PMR is first latched into the
DWMBB/A module. The transaction is checked for parity errors and, if
none are detected and no DMA transaction is in progress, the specific PMR
is accessed. If a DMA transaction is in progress, the DMA transaction
finishes its PMR access before the I/O write data, with a generated 12-bit
ECC code, is written to the specified PMR. The DWMBB/A module then
completes the transaction by clearing the appropriate I/O flags.
3.3.3 I/O References to DWMBB/B Module Registers or to VAXBI Registers
An I/O transaction directed to the DWMBB/B module or to a VAXBI I/O
register is first latched into the DWMBB/A module. Parity is checked and,
if no errors are detected, the DWMBB/A module informs the DWMBB/B
module that it has an I/O transaction to process. When the DWMBB/B
module is ready, it fetches the I/O transaction (read or write) from the
DWMBB/A module.
When the I/O transaction is a read of a VAXBI I/O device register, the
DWMBB/B issues the transaction onto the VAXBI and waits for the read
data to be returned.
Once the DWMBB/B module has I/O read data (from either a VAXBI node
or one of its internal registers), it loads the read data into the DWMBB/A
module and signals the DWMBB/A module that it has completed the I/O
read transaction. The DWMBB/A module, if not already busy, arbitrates
for the XMI as a responder. When a grant is received, the DWMBB/A
module sends the I/O read data to the originating XMI commander, clears
the appropriate I/O flags, and is ready to accept another I/O transaction.
If the I/O transaction is a write to a VAXBI I/O device register, the
DWMBB/B module issues the transaction onto the VAXBI, waits for
confirmation that the VAXBI node successfully received the transaction,
and informs the DWMBB/A module that it has completed the I/O write.
When the DWMBB/B module detects this confirmation, it clears the
appropriate I/O flags and is ready to accept another I/O transaction.
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