Installation guide

1-24 Registers
Figure 1-50 TBADR — Translation Buffer Parity Address Register
Figure 1-51 TBSTS — Translation Buffer Parity Status Register
Figure 1-52 PCADR — P-Cache Parity Address Register
31 0
BXB-0150-92
VA_TB_PE
31 29 28 98 43 065 12
SRC 000000000000000000 CMD
BXB-0151-92
EM_VAL
TPERR
DPERR
LOCK
00
31 3012
PC_PE_PA 0 0 0
BXB-0152-92