Installation guide

System Errors 8-3
Table 8-1 Machine Check Frame Parameters
Longword Bits Contents
SP+0
<31:0> Byte count. The size of the stack frame in bytes,
not including the PC, PSL, or the byte count long-
word. Stack frame PC and PSL values should al-
ways be referenced using this count as an offset
from the stack pointer.
SP+4
<31:29> AST LVL. The current value of the register.
<23:16> Machine check code. The reason for the machine
check, as listed in Table 8-2.
<7:0> CPUID. Contains the current value of the CPUID
register.
SP+8
<31:0> INT.SYS register. The value of the INT.SYS regis-
ter, which is read onto the A-bus by the microcode.
SP+12
<31:0> SAVEPC register. The SAVEPC register, which is
loaded by microcode with the PC value in certain
circumstances. It is used in error handling for PTE
read errors with PSL <FPD> set in this stack
frame.
SP+16
<31:0> VA register. The contents of the Ebox VA register,
which may be loaded from the output of the ALU.
SP+20
<31:0> Q register. The contents of the Ebox Q register,
which may be loaded from the output of the shifter.
SP+24
<31:28> Rn. The value of the Rn register, which is used to
obtain the register number for the CVTPL and
EDIV instructions. In general, the value of this
field is unpredictable.
<25:24> Mod. A copy of the currrent mode field, PSL
<CUR_MOD>.
<23:16> Opcode. Bits <7:0> of the instruction opcode. The
FD bit is not included.