User`s guide

System Initialization and Acceptance Testing (Normal Operation)
4.6 Main Memory Layout and State
Each bit in the PFN bitmap corresponds to a page in main memory. There is
a one to one correspondence between a page frame number (origin 0) and a bit
index in the bitmap. A one in the bitmap indicates that the page is "good" and
can be used. A zero indicates that the page is "bad" and should not be used.
The PFN bitmap is protected by a checksum stored in the NVRAM. The
checksum is a simple byte wide, two’s complement checksum. The sum of all
bytes in the bitmap and the bitmap checksum should result in zero.
4.6.1.2 Scatter/Gather Map
On power-up, the scatter/gather map is initialized by the firmware to map to
the first 4M bytes of main memory. Main memory pages will not be mapped if
there is a corresponding page in Q22–bus memory.
On a processor halt other than power-up, the contents of the scatter/gather
map is undefined, and is dependent on operating system usage.
Operating systems should not move the location of the scatter/gather map, and
should access the map only on aligned longwords through the local I/O space
of 20088000 to 2008FFFC, inclusive. The Q22–bus map base register (QMBR),
is set up by the firmware to point to this area, and should not be changed by
software.
4.6.1.3 Firmware "Scratch Memory"
This section of memory is reserved for the firmware. However, it is only used
after successful execution of the memory diagnostics and initialization of
the PFN bitmap and scatter/gather map. This memory is primarily used for
diagnostic purposes.
4.6.2 Contents of Main Memory
The contents of main memory are undefined after the diagnostics have run.
Typically, nonzero test patterns will be left in memory.
The diagnostics will "scrub" all of main memory, so that no power-up induced
errors remain in the memory system. On the KA52/53/54 memory subsystem,
the state of the ECC bits and the data bits are undefined on initial power-up.
This can result in single and multiple bit errors if the locations are read before
written, because the ECC bits are not in agreement with their corresponding
data bits. An aligned longword write to every location (done by diagnostics)
eliminates all power-up induced errors.
System Initialization and Acceptance Testing (Normal Operation) 4–19