User`s guide

Error Messages
G.2 Halt Code Messages
The number preceding the halt message is the "halt code." This number is
obtained from SAVPSL<13:8>(RESTART_CODE), IPR 43, which is saved on
any processor restart operation.
Table G–1 HALT Messages
Code Message Description
?02 EXT HLT External halt, caused by either console BREAK condition,
Q22–bus BHALT_L, or DBR<AUX_HLT> bit was set while
enabled.
_03 Power-up, no halt message is displayed. However, the
presence of the firmware banner and diagnostic countdown
indicates this halt reason.
?04 ISP ERR In attempting to push state onto the interrupt stack during
an interrupt or exception, the processor discovered that the
interrupt stack was mapped NO ACCESS or NOT VALID.
?05 DBL ERR The processor attempted to report a machine check to the
operating system, and a second machine check occurred.
?06 HLT INST The processor executed a HALT instruction in kernel mode.
?07 SCB ERR3 The SCB vector had bits <1:0> equal to 3.
?08 SCB ERR2 The SCB vector had bits <1:0> equal to 2.
?0A CHM FR ISTK A change mode instruction was executed when PSL<IS>
was set.
?0B CHM TO ISTK The SCB vector for a change mode had bit <0> set.
?0C SCB RD ERR A hard memory error occurred while the processor was
trying to read an exception or interrupt vector.
?10 MCHK AV An access violation or an invalid translation occurred
during machine check exception processing.
?11 KSP AV An access violation or translation not valid occurred during
processing of a kernel stack not valid exception.
?12 DBL ERR2 Double machine check error. A machine check occurred
while trying to service a machine check.
?13 DBL ERR3 Double machine check error. A machine check occurred
while trying to service a kernel stack not valid exception.
?19 PSL EXC5
1
PSL<26:24> = 5 on interrupt or exception.
1
For the last six cases, the VAX architecture does not allow execution on the interrupt stack while in a mode
other than kernel. In the first three cases, an interrupt is attempting to run on the interrupt stack while
not in kernel mode. In the last three cases, an REI instruction is attempting to return to a mode other than
kernel and still run on the interrupt stack.
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G–2 Error Messages