User`s guide

E
NVRAM Partitioning
This appendix describes how the CPU firmware partitions the SSC 1 KB
battery-backed-up (BBU) RAM.
E.1 SSC RAM Layout
The KA52/53/54 firmware uses the 1K byte of NVRAM on the SSC (see
Figure E–1), for storage of firmware specific data structures and other
information that must be preserved across power cycles. This NVRAM resides
in the SSC chip starting at address 20140400. The NVRAM should not be used
by the operating systems except as documented below. This NVRAM is not
reflected in the bitmap built by the firmware.
Figure E–1 KA52/53/54 SSC NVRAM Layout
20140400
201407FC
Public Data Structures
(CPMBX, etc.)
Service Vectors
Firmware Stack
Diagnostic State
Rsvd for Customer Use
MLO-008655
E.1.1 Public Data Structures
Public data structures consist of three bytes, NVR0, NVR1, and NVR2. Their
functions are described in Table E–1, Table E–2, and Table E–3.
NVRAM Partitioning E–1