User`s guide

Configurable Machine State
23: ROM access time
0 = 350 ns*
22:20: ROM size
110 = 512KB
18:16: Halt protected space
110 = 20040000 - 200BFFFF (historical)
15: n/a
14:12: n/a
6: Programmable address strobe 1 ready enable (for BDR)
1 = ready asserted after address strobe
5:4: Programmable address strobe 1 enable (for BDR)
11 = read enabled, write enabled
2: Programmable address strobe 0 ready enable
0 = no ready after address strobe* Used for FEPROM
programming
1:0: Programmable address strobe 0 enable
00 = read disabled, write disabled* Used for FEPROM
programming
SSCBT: SSC Bus Time Out Register (2014 0020)
23:0: Bus timeout interval = 4000hex (16.384 ms)
range = 1 to FFFFFF (1 µs to 16.77 sec)
ADS0MAT: Programmable Address Strobe 0 Match Register (2014 0130)
29:2: Match address
0 = disabled*
ADS0MAS: Programmable Address Strobe 0 Mask Register (2014 0134)
29:2: Mask address bits
ADS1MAT: Programmable Address Strobe 1 Match Register (2014 0140)
29:2: Match address = 20084000 (for BDR)
ADS1MAS: Programmable Address Strobe 1 Mask Register (2014 0144)
29:2: Mask address bits = 7C (for BDR)
T1CR: Programmable Timer 0 Control Register (2014 0100)
6: Interrupt enable
0 = disabled*
2: STP
0 = run after overflow*
0: RUN
0 = counter not running* (historical)
D–8 Configurable Machine State